Publications in OpenAlex of which a co-author is affiliated to this organization
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| Title | DOI |
|---|---|
| https://doi.org/10.1007/s12274-011-0183-0 | Strain-induced semiconductor to metal transition in the two-dimensional honeycomb structure of MoS2 |
| https://doi.org/10.1016/j.mee.2009.03.045 | High-k dielectrics for future generation memory devices (Invited Paper) |
| https://doi.org/10.1149/1.3501970 | Influence of the Oxidant on the Chemical and Field-Effect Passivation of Si by ALD Al[sub 2]O[sub 3] |
| https://doi.org/10.1149/2.067203jes | Plasma-Assisted ALD for the Conformal Deposition of SiO2: Process, Material and Electronic Properties |
| https://doi.org/10.1016/j.datak.2020.101850 | Interpretable Anomaly Prediction: Predicting anomalous behavior in industry 4.0 settings via regularized logistic regression tools |
| https://doi.org/10.1002/admi.201800870 | Diffusion‐Mediated Growth and Size‐Dependent Nanoparticle Reactivity during Ruthenium Atomic Layer Deposition on Dielectric Substrates |
| https://doi.org/10.1149/1.3301663 | Atomic Layer Deposition of Gd-Doped HfO[sub 2] Thin Films |
| https://doi.org/10.1109/iedm45625.2022.10019525 | High performance La-doped HZO based ferroelectric capacitors by interfacial engineering |
| https://doi.org/10.1149/2.0071908jss | Very Low Temperature Epitaxy of Group-IV Semiconductors for Use in FinFET, Stacked Nanowires and Monolithic 3D Integration |
| https://doi.org/10.1038/s41467-025-56357-0 | Multi-project wafer runs for electronic graphene devices in the European 2D-Experimental Pilot Line project |
| https://doi.org/10.2494/photopolymer.30.667 | Sequential Infiltration Synthesis for Line Edge Roughness Mitigation of EUV Resist |
| https://doi.org/10.1109/ted.2024.3422950 | Electrical Stability of MOS Structures With AlON and Al₂O₃ Dielectrics Deposited on n- and p-Type GaN |
| https://doi.org/10.1063/1.1787624 | Island growth in the atomic layer deposition of zirconium oxide and aluminum oxide on hydrogen-terminated silicon: Growth mode modeling and transmission electron microscopy |
| https://doi.org/10.1016/j.surfcoat.2007.05.009 | Batch ALD: Characteristics, comparison with single wafer ALD, and examples |
| https://doi.org/10.1109/tdmr.2004.837209 | Performance and Reliability Features of Advanced Nonvolatile Memories Based on Discrete Traps (Silicon Nanocrystals, SONOS) |
| https://doi.org/10.1063/1.4930076 | Correlation of interface states/border traps and threshold voltage shift on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors |
| https://doi.org/10.1149/1.3244213 | Atomic Layer Deposition of Strontium Titanate Films Using Sr([sup t]Bu[sub 3]Cp)[sub 2] and Ti(OMe)[sub 4] |
| https://doi.org/10.1063/1.3246835 | Composition influence on the physical and electrical properties of SrxTi1−xOy-based metal-insulator-metal capacitors prepared by atomic layer deposition using TiN bottom electrodes |
| https://doi.org/10.1109/led.2016.2646758 | Reduction of the Cell-to-Cell Variability in Hf1-xAlxOyBased RRAM Arrays by Using Program Algorithms |
| https://doi.org/10.1109/irps.2015.7112769 | Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs |
| https://doi.org/10.1016/j.tsf.2009.12.110 | Porogen residues detection in optical properties of low-k dielectrics cured by ultraviolet radiation |
| https://doi.org/10.1088/0268-1242/22/1/s43 | Highly tensile strained silicon–carbon alloys epitaxially grown into recessed source drain areas of NMOS devices |
| https://doi.org/10.1016/j.surfcoat.2007.04.096 | Characterization and optimization of porogen-based PECVD deposited extreme low-k materials as a function of UV-cure time |
| https://doi.org/10.1038/srep28155 | Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition |
| https://doi.org/10.1149/06406.0977ecst | Characterization of Epitaxial Si:C:P and Si:P Layers for Source/Drain Formation in Advanced Bulk FinFETs |
| https://doi.org/10.1109/led.2011.2164775 | Highly Scaled Vertical Cylindrical SONOS Cell With Bilayer Polysilicon Channel for 3-D nand Flash Memory |
| https://doi.org/10.1149/07508.0347ecst | (Invited) Selective Epitaxial Growth of High-P Si:P for Source/Drain Formation in Advanced Si nFETs |
| https://doi.org/10.1038/s41598-018-29548-7 | Impact of the precursor chemistry and process conditions on the cell-to-cell variability in 1T-1R based HfO2 RRAM devices |
| https://doi.org/10.1016/j.mee.2011.04.015 | Influence of porosity on electrical properties of low-k dielectrics |
| https://doi.org/10.1016/j.mssp.2016.12.024 | Fundamentals of Ge 1−x Sn x and Si y Ge 1−x-y Sn x RPCVD epitaxy |
| https://doi.org/10.1109/ispsd.2015.7123430 | The impact of the gate dielectric quality in developing Au-free D-mode and E-mode recessed gate AlGaN/GaN transistors on a 200mm Si substrate |
| https://doi.org/10.1149/1.3258664 | Impact of Precursor Chemistry and Process Conditions on the Scalability of ALD HfO[sub 2] Gate Dielectrics |
| https://doi.org/10.1259/dmfr.20170285 | DIMITRA paediatric skull phantoms: development of age-specific paediatric models for dentomaxillofacial radiology research |
| https://doi.org/10.1109/vlsit.2014.6894403 | Tailoring switching and endurance / retention reliability characteristics of HfO<inf>2</inf> / Hf RRAM with Ti, Al, Si dopants |
| https://doi.org/10.1109/iedm.2015.7409805 | Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow |
| https://doi.org/10.1117/12.2085739 | Standard cell design in N7: EUV vs. immersion |
| https://doi.org/10.1016/j.solmat.2015.07.040 | “Zero-charge” SiO2/Al2O3 stacks for the simultaneous passivation of n+ and p+ doped silicon surfaces by atomic layer deposition |
| https://doi.org/10.1063/1.4928332 | Temperature dependence of frequency dispersion in III–V metal-oxide-semiconductor C-V and the capture/emission process of border traps |
| https://doi.org/10.1109/cicc.2014.6946037 | Design Technology co-optimization for N10 |
| https://doi.org/10.1109/essderc.2002.194998 | Impact of ALCVD and PVD Titanium Nitride Deposition on Metal Gate Capacitors |
| https://doi.org/10.1109/iedm19574.2021.9720684 | Buried Power Rail Metal exploration towards the 1 nm Node |
| https://doi.org/10.1109/imw.2011.5873209 | Novel Bi-Layer Poly-Silicon Channel Vertical Flash Cell for Ultrahigh Density 3D SONOS NAND Technology |
| https://doi.org/10.1109/vlsit.2016.7573420 | Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and L<inf>g</inf> down to 36nm |
| https://doi.org/10.1109/iedm19574.2021.9720527 | Dipole-First Gate Stack as a Scalable and Thermal Budget Flexible Multi-Vt Solution for Nanosheet/CFET Devices |
| https://doi.org/10.1002/admi.202202426 | MoS2 Synthesized by Atomic Layer Deposition as Cu Diffusion Barrier |
| https://doi.org/10.1149/1.3186020 | Growth and Material Characterization of Hafnium Titanates Deposited by Atomic Layer Deposition |
| https://doi.org/10.1149/1.2181430 | Evaluation of Atomic Layer Deposited NbN and NbSiN as Metal Gate Materials |
| https://doi.org/10.1109/iedm45625.2022.10019501 | Low temperature source/drain epitaxy and functional silicides: essentials for ultimate contact scaling |
| https://doi.org/10.1109/essderc.2017.8066636 | PPAC scaling enablement for 5nm mobile SoC technology |
| https://doi.org/10.1117/12.864247 | EUV mask stack optimization for enhanced imaging performance |
| https://doi.org/10.1109/ted.2024.3487080 | Backside Power Delivery With Relaxed Overlay for Backside Patterning Using Extreme Wafer Thinning and Molybdenum-Filled Slit Nano Through Silicon Vias |
| https://doi.org/10.1117/12.884504 | Imaging performance improvements by EUV mask stack optimization |
| https://doi.org/10.1088/1757-899x/8/1/012023 | Non-linear dielectric constant increase with Ti composition in high-k ALD-HfTiOxfilms after O2crystallization annealing |
| https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631442 | Vt Fine-Tuning in Multi-Vt Gate-All-Around Nanosheet nFETs Using Rare-Earth Oxide-Based Dipole-First Gate Stack Compatible with CFET Integration |
| https://doi.org/10.1109/ulis.2009.4897559 | Carbon-based thermal stabilization techniques for junction and silicide engineering for high performance CMOS periphery in memory applications |
| https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830220 | 300 mm Wafer-scale In-situ CVD Growth Achieving 5.1×10-10 Ω-cm2 P-Type Contact Resistivity: Record 2.5×1021 cm-3 Active Doping and Demonstration on Highly-Scaled 3D Structures |
| https://doi.org/10.1021/acs.chemmater.4c00286 | Low-Temperature Dechlorosilylation Chemistry for Area-Selective Deposition of Ge2Sb2Te5 and Its Mechanism in Nanopatterns |
| https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185430 | Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET |
| https://doi.org/10.1007/978-981-97-5028-3_12 | Algebraic Cryptanalysis of the HADES Design Strategy: Application to Poseidon and Poseidon2 |
| https://doi.org/10.1145/3725843.3756036 | Flexing RISC-V Instruction Subset Processors to Extreme Edge |
| https://doi.org/10.21879/faeeba2358-0194.2018.v27.n53.p237-250 | NO “FIO DA NAVALHA”: projetos de futuro de jovens em privação de liberdade |
| https://doi.org/10.1021/acsanm.5c03229 | Density Functional Theory Study of Engineering TiS2 Work Function through Intrinsic Defects and Surface Oxidation for Field-Effect Transistors |
| https://doi.org/10.1109/iedm50572.2025.11353791 | Junction-engineered Scaled High-performance GAA Nanosheet FETs with Ultra-low Temperature (< 350 °C) SiGe: B Source/Drain |
| https://doi.org/10.1007/978-981-95-4434-9_6 | Sonikku: Gotta Speed, Keed! A Family of Fast and Secure MACs |
| https://doi.org/10.1109/iedm.2003.1269352 | How far will silicon nanocrystals push the scaling limits of NVMs technologies? |
| https://doi.org/10.1063/1.2360197 | Si O 2 ∕ Si 3 N 4 ∕ Al 2 O 3 stacks for scaled-down memory devices: Effects of interfaces and thermal annealing |
| https://doi.org/10.1117/12.836979 | Low temperature plasma-enhanced ALD enables cost-effective spacer defined double patterning (SDDP) |
| https://doi.org/10.1016/j.mee.2007.05.025 | A robust k∼2.3 SiCOH low-k film formed by porogen removal with UV-cure |
| https://doi.org/10.1016/j.tsf.2011.01.339 | Effect of ultraviolet curing wavelength on low-k dielectric material properties and plasma damage resistance |
| https://doi.org/10.1109/led.2008.2005593 | Strain Enhanced nMOS Using In Situ Doped Embedded $\hbox{Si}_{1 - x}\hbox{C}_{x}$ S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process |
| https://doi.org/10.1016/j.mee.2007.05.017 | Improved thermal stability of Ni-silicides on Si:C epitaxial layers |
| https://doi.org/10.1109/imw.2014.6849381 | Analysis of performance/variability trade-off in Macaroni-type 3-D NAND memory |
| https://doi.org/10.1088/1361-6641/aae2f9 | Epitaxial GeSn: impact of process conditions on material quality |
| https://doi.org/10.1063/1.2338768 | Evaluation of integrity and barrier performance of atomic layer deposited WNxCy films on plasma enhanced chemical vapor deposited SiO2 for Cu metallization |
| https://doi.org/10.1149/1.3561423 | Ozone Based Atomic Layer Deposition of Hafnium Oxide and Impact of Nitrogen Oxide Species |
| https://doi.org/10.1109/ted.2017.2742578 | Probing the Critical Region of Conductive Filament in Nanoscale HfO2 Resistive-Switching Device by Random Telegraph Signals |
| https://doi.org/10.1117/12.896816 | Mask aspects of EUVL imaging at 27nm node and below |
| https://doi.org/10.1109/irps.2017.7936259 | Gate stack thermal stability and PBTI reliability challenges for 3D sequential integration: Demonstration of a suitable gate stack for top and bottom tier nMOS |
| https://doi.org/10.1016/j.apsusc.2004.03.102 | On the reliability of SIMS depth profiles through HfO2-stacks |
| https://doi.org/10.1117/12.2048079 | Design technology co-optimization for a robust 10nm Metal1 solution for logic design and SRAM |
| https://doi.org/10.1149/09805.0037ecst | Contact Resistivity of Highly Doped Si:P, Si:As, and Si:P:As Epi Layers for Source/Drain Epitaxy |
| https://doi.org/10.1117/12.881690 | Patterning challenges in setting up a 16nm node 6T-SRAM device using EUV lithography |
| https://doi.org/10.1109/ted.2018.2792221 | Investigation of Preexisting and Generated Defects in Nonfilamentary a-Si/TiO2 RRAM and Their Impacts on RTN Amplitude Distribution |
| https://doi.org/10.1109/iitc52079.2022.9881304 | Barrierless ALD Molybdenum for Buried Power Rail and Via-to-Buried Power Rail metallization |
| https://doi.org/10.1117/12.2047449 | Improving on-wafer CD correlation analysis using advanced diagnostics and across-wafer light-source monitoring |
| https://doi.org/10.1117/1.jmm.21.4.043202 | Extend 0.33 NA extreme ultraviolet single patterning to pitch 28-nm metal design by low-n mask |
| https://doi.org/10.1038/s41699-024-00464-x | Enhancing dielectric passivation on monolayer WS2 via a sacrificial graphene oxide seeding layer |
| https://doi.org/10.1117/12.2658871 | Computational evaluation of critical logical metal layers of pitch 20-24nm and the aberration sensitivity in high NA EUV single patterning |
| https://doi.org/10.1149/05009.0965ecst | SiGe Band-to-Band Tunneling Calibration based on p-i-n Diodes: Fabrication, Measurement and Simulation |
| https://doi.org/10.1117/12.2685543 | Validation of imaging benefits of dual monopole exposures |
| https://doi.org/10.1016/s0167-9317(02)00795-5 | Development of sub-10-nm atomic layer deposition barriers for Cu/low-k interconnects |
| https://doi.org/10.1063/1.1866640 | Band alignment at the interface of (100)Si with HfxTa1−xOy high-κ dielectric layers |
| https://doi.org/10.1016/j.mee.2008.06.004 | High aspect ratio via metallization for 3D integration using CVD TiN barrier and electrografted Cu seed |
| https://doi.org/10.1002/cvde.200906833 | Atomic Layer Deposition of Gadolinium Aluminate using Gd(iPrCp)3, TMA, and O3 or H2O |
| https://doi.org/10.1149/1.2356280 | Low Temperature Silcore® Deposition of Undoped and Doped Silicon Films |
| https://doi.org/10.1016/j.mee.2006.07.003 | Properties of ALD HfTaxOy high-k layers deposited on chemical silicon oxide |
| https://doi.org/10.1149/1.2712051 | Atomic Layer Deposition of Hafnium Silicate from HfCl[sub 4], SiCl[sub 4], and H[sub 2]O |
| https://doi.org/10.1149/1.3355207 | Ozone-Based Metal Oxide Atomic Layer Deposition: Impact of N[sub 2]/O[sub 2] Supply Ratio in Ozone Generation |
| https://doi.org/10.1117/12.881688 | Joint optimization of layout and litho for SRAM and logic towards the 20nm node using 193i |
| https://doi.org/10.1016/j.mee.2010.06.010 | Phase formation and texture of nickel silicides on Si1−xCx epilayers |