Publications in OpenAlex of which a co-author is affiliated to this organization
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| Title | DOI |
|---|---|
| https://doi.org/10.1109/led.2017.2657794 | A New Quality Metric for III–V/High-k MOS Gate Stacks Based on the Frequency Dispersion of Accumulation Capacitance and the CET |
| https://doi.org/10.1109/iedm.2016.7838534 | Si-passivated Ge nMOS gate stack with low Dit and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal |
| https://doi.org/10.1016/j.mee.2007.05.023 | Materials characterization of WNxCy, WNx and WCx films for advanced barriers |
| https://doi.org/10.1109/iedm.2012.6479064 | Phosphorus doped SiC Source Drain and SiGe channel for scaled bulk FinFETs |
| https://doi.org/10.1016/j.mee.2005.04.050 | Band alignment between (100)Si and Hf-based complex metal oxides |
| https://doi.org/10.1117/12.2086091 | Impact of sequential infiltration synthesis on pattern fidelity of DSA lines |
| https://doi.org/10.1109/imw.2011.5873198 | An Ultra-Thin Hybrid Floating Gate Concept for Sub-20nm NAND Flash Technologies |
| https://doi.org/10.1149/05004.0207ecst | (Invited) Current Status of High-k and Metal Gates in CMOS |
| https://doi.org/10.1149/1.3118928 | High-k Dielectrics and Metal Gates for Future Generation Memory Devices |
| https://doi.org/10.1016/j.mee.2004.01.021 | Oxide–nitride–oxide layer optimisation for reliable embedded SONOS memories |
| https://doi.org/10.1149/1.2779548 | Impact of Hf-Precursor Choice on Scaling and Performance of High-k Gate Dielectrics |
| https://doi.org/10.1143/jjap.48.04c018 | Dielectric Reliability of 50 nm Half Pitch Structures in Aurora® LK |
| https://doi.org/10.1109/vlsit.2016.7573410 | Record mobility (μ<inf>eff</inf> ∼3100 cm2/V-s) and reliability performance (V<inf>ov</inf>∼0.5V for 10yr operation) of In<inf>0.53</inf>Ga<inf>0.47</inf>As MOS devices using improved surface preparation and a novel interfacial layer |
| https://doi.org/10.1116/1.4967308 | Impact of temperature on conduction mechanisms and switching parameters in HfO2-based 1T-1R resistive random access memories devices |
| https://doi.org/10.1109/irps.2017.7936422 | BTI reliability of InGaAs nMOS gate-stack: On the impact of shallow and deep defect bands on the operating voltage range of III-V technology |
| https://doi.org/10.1109/iitc52079.2022.9881322 | ALD Mo for Advanced MOL Local Interconnects |
| https://doi.org/10.1143/jjap.51.05ec04 | Impact of Hydrocarbon Control in Ultraviolet-Assisted Restoration Process for Extremely Porous Plasma Enhanced Chemical Vapor Deposition SiOCH Films with k = 2.0 |
| https://doi.org/10.1117/12.2086100 | Layout optimization and trade-off between 193i and EUV-based patterning for SRAM cells to improve performance and process variability at 7nm technology node |
| https://doi.org/10.1109/led.2016.2589661 | Electrical Characteristics of p-Type Bulk Si Fin Field-Effect Transistor Using Solid-Source Doping With 1-nm Phosphosilicate Glass |
| https://doi.org/10.1149/09301.0007ecst | Epitaxial Growth of Ga-doped SiGe for Reduction of Contact Resistance in finFET Source/Drain Materials |
| https://doi.org/10.1116/6.0000821 | Engineering high quality and conformal ultrathin SiNx films by PEALD for downscaled and advanced CMOS nodes |
| https://doi.org/10.1109/icsict.2010.5667396 | Channel hot-carrier degradation on strained MOSFETs with embedded SiGe or SiC Source/Drain |
| https://doi.org/10.1016/j.sse.2009.03.017 | Performance improvement in narrow MuGFETs by gate work function and source/drain implant engineering |
| https://doi.org/10.1117/12.2238928 | Metal stack optimization for low-power and high-density for N7-N5 |
| https://doi.org/10.1021/acs.langmuir.1c02036 | Reaction Mechanism and Selectivity Control of Si Compound ALE Based on Plasma Modification and F-Radical Exposure |
| https://doi.org/10.1063/5.0072343 | Nano-analytical investigation of the forming process in an HfO2-based resistive switching memory |
| https://doi.org/10.1149/05009.0491ecst | Orientation Dependence of Si1-xCx:P Growth and the Impact on FinFET Structures |
| https://doi.org/10.1016/j.mssp.2023.107346 | Effect of downsizing and metallization on switching performance of ultrathin hafnium oxide memory cells |
| https://doi.org/10.1117/12.2221894 | Design-based metrology: beyond CD/EPE metrics to evaluate printability performance |
| https://doi.org/10.1117/12.2583800 | Extending 0.33 NA EUVL to 28 nm pitch using alternative mask and controlled aberrations |
| https://doi.org/10.1117/12.3051506 | Logic patterning and roughness improvement applications with directional ion beam etch |
| https://doi.org/10.1109/led.2007.896900 | Achieving Conduction Band-Edge Effective Work Functions by $\hbox{La}_{2}\hbox{O}_{3}$ Capping of Hafnium Silicates |
| https://doi.org/10.1109/isscc.2005.1493882 | Processing of MEMS gyroscopes on top of CMOS ICs |
| https://doi.org/10.1116/1.2713115 | Atomic layer deposition of hafnium silicate gate dielectric layers |
| https://doi.org/10.1149/1.2355808 | Tensile Strained Selective Silicon Carbon Alloys for Recessed Source Drain Areas of Devices |
| https://doi.org/10.1109/memsys.2007.4433007 | A 10 μm thick poly-SiGe gyroscope processed above 0.35 μm CMOS |
| https://doi.org/10.1109/ted.2007.904478 | Effects of $\hbox{Al}_{2}\hbox{O}_{3}$ Dielectric Cap and Nitridation on Device Performance, Scalability, and Reliability for Advanced High- $\kappa$/Metal Gate pMOSFET Applications |
| https://doi.org/10.1016/j.mee.2009.06.013 | Characterization of the annealing impact on La2O3/HfO2 and HfO2/La2O3 stacks for MOS applications |
| https://doi.org/10.1149/1.1768547 | ALD of Ta(Si)N Thin Films Using TDMAS as a Reducing Agent and as a Si Precursor |
| https://doi.org/10.1109/iedm.2009.5424365 | Demonstration of scaled 0.099µm<sup>2</sup> FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technology |
| https://doi.org/10.1109/vlsit.2010.5556198 | Novel dual layer floating gate structure as enabler of fully planar flash memory |
| https://doi.org/10.1002/pssc.200777742 | Spectroscopic ellipsometry and ellipsometric porosimetry studies of CVD low‐k dielectric films |
| https://doi.org/10.1109/rtp.2004.1441942 | NiSi contact formation - process integration advantages with partial Ni conversion |
| https://doi.org/10.1109/iedm.2008.4796852 | 0.5 nm EOT low leakage ALD SrTiO<inf>3</inf> on TiN MIM capacitors for DRAM applications |
| https://doi.org/10.1016/j.mee.2009.03.029 | Sr excess accommodation in ALD grown SrTiO3 and its impact on the dielectric response |
| https://doi.org/10.1016/j.apsusc.2004.03.110 | Nitrogen analysis in high-k stack layers: a challenge |
| https://doi.org/10.1143/jjap.49.04db05 | Integration and Dielectric Reliability of 30 nm Half Pitch Structures in Aurora® LK HM |
| https://doi.org/10.1149/06409.0133ecst | Engineering the III-V Gate Stack Properties by Optimization of the ALD Process |
| https://doi.org/10.7567/jjap.54.04df02 | Combined plasma-enhanced-atomic-layer-deposition gate dielectric and in situ SiN cap layer for reduced threshold voltage shift and dynamic ON-resistance dispersion of AlGaN/GaN high electron mobility transistors on 200 mm Si substrates |
| https://doi.org/10.1109/iitc.2010.5510698 | Quantifying LER to predict its impact on BEOL TDDB reliability at 20nm ½ pitch |
| https://doi.org/10.1109/essderc.2008.4681733 | Metal gate thickness optimization for MuGFET performance improvement |
| https://doi.org/10.1117/12.2220043 | Improved cost-effectiveness of the block co-polymer anneal process for DSA |
| https://doi.org/10.1149/08607.0163ecst | (Invited) Very Low Temperature Epitaxy of Group-IV Semiconductors for Use in FinFET, Stacked Nanowires and Monolithic 3D Integration |
| https://doi.org/10.1149/1.2355843 | Selective Epitaxy of Si/SiGe to Improve pMOS Devices by Recessed Source/Drain and/or Buried SiGe Channels |
| https://doi.org/10.1117/12.2025863 | Lithographic challenges and their solutions for critical layers in sub-14nm node logic devices |
| https://doi.org/10.1109/iitc.2008.4546923 | Key factors to sustain the extension of a MHM-based integration scheme to medium and high porosity PECVD low-k materials |
| https://doi.org/10.1149/1.3485245 | New Mechanisms for Ozone-Based ALD Growth of High-k Dielectrics via Nitrogen-Oxygen Species |
| https://doi.org/10.1109/led.2007.899435 | Nitrogen Incorporation in HfSiO(N)/TaN Gate Stacks: Impact on Performances and NBTI |
| https://doi.org/10.1557/proc-1156-d02-08 | Optimization of low-k UV Curing: Effect of Wavelength on Critical Properties of the Dielectrics |
| https://doi.org/10.1149/05009.0339ecst | High Efficiency Low Temperature Pre-epi Clean Method for Advanced Group IV epi Processing |
| https://doi.org/10.1016/j.mee.2010.06.011 | The influence of N containing plasmas on low-k films |
| https://doi.org/10.1149/1.2979988 | Batch Atomic Layer Deposition of HfO2 and ZrO2 Films Using Cyclopentadienyl Precursors |
| https://doi.org/10.1162/leon_a_01224 | What Public Visualization Can Learn from Street Art |
| https://doi.org/10.1117/12.2573160 | Mask contribution to OPC model accuracy |
| https://doi.org/10.1016/j.microrel.2020.113996 | Extensive assessment of the charge-trapping kinetics in InGaAs MOS gate-stacks for the demonstration of improved BTI reliability |
| https://doi.org/10.1109/vlsitechnology18217.2020.9265058 | Surface Ga-Boosted Boron-Doped Si0.5 Ge0.5 using In-Situ CVD Epitaxy: Achieving 1.1 × 1021 cm−3 Active Doping Concentration and 5.7× 10−10 Ω-cm2 Contact Resistivity |
| https://doi.org/10.1117/12.918495 | NXE:3100 full wafer imaging performance and budget verification |
| https://doi.org/10.1002/crat.201600364 | Carbon doped GaN layers grown by Pseudo‐Halide Vapour Phase Epitaxy |
| https://doi.org/10.1117/12.2515177 | Scatterometry and AFM measurement combination for area selective deposition process characterization |
| https://doi.org/10.1117/12.2515178 | Localized power spectral density analysis on atomic force microscopy images for advanced patterning applications |
| https://doi.org/10.1039/d0ma01014f | Pulsed chemical vapor deposition of conformal GeSe for application as an OTS selector |
| https://doi.org/10.1149/10904.0087ecst | Low Temperature Selective Epitaxy of Group-IV Semiconductors for Nanoelectronics |
| What Public Visualization Can Learn From Street Art | |
| https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185320 | Record High Active Boron Doping using Low Temperature In-situ CVD: Enabling Sub-5×10−10 Ω-cm2 ρc from Cryogenic (5 K) to Room Temperature |
| https://doi.org/10.1117/12.2503321 | EUV pupil optimization for 32nm pitch logic structures |
| https://doi.org/10.23919/mikon54314.2022.9924926 | A 39-GHz 18.5-mW LNA with T/R switch, 15.4-dB gain, -2.2dBm IIP3, 5.6-dB NF, for a 5G in-cabin basestation in 22-nm FD-SOI |
| https://doi.org/10.1117/1.jmm.22.4.041604 | Voltage contrast determination of design rules at the limits of EUV single patterning |
| https://doi.org/10.1016/j.mssp.2009.09.004 | A power rate law study of silicon germanium selective vapor phase epitaxy kinetics |
| https://doi.org/10.1016/j.tsf.2009.10.046 | Analysis of silicon germanium vapor phase epitaxy kinetics |
| https://doi.org/10.1117/12.2515503 | Impact of sequential infiltration synthesis (SIS) on roughness and stochastic nano-failures for EUVL patterning |
| https://doi.org/10.1149/1.3481630 | Evaluation of HfLaOx as Blocking Layer for Innovative Nonvolatile Memory Applications |
| https://doi.org/10.1109/iitc/mam57687.2023.10154783 | Selective ALD Mo Deposition in 10nm Contacts |
| https://doi.org/10.1149/ma2005-01/14/622 | Properties of HfTaxOy High-K Layers Deposited by ALCVD |
| https://doi.org/10.1149/2162-8777/ac546e | B and Ga Co-Doped Si1−xGex for p-Type Source/Drain Contacts |
| https://doi.org/10.1109/imw59701.2024.10536954 | Pure-Metal Replacement Gate for Reliable 30 nm Pitch Scaled 3D NAND Flash |
| https://doi.org/10.1109/rtp.2008.4690566 | Wafer temperature measurement in conduction-based RTP systems |
| https://doi.org/10.1117/12.2535636 | Detection and mitigation of furnace anneal induced distortions at the wafer edge |
| https://doi.org/10.1116/6.0001922 | Effect of rapid thermal annealing on the mechanical stress and physico-chemical properties in plasma enhanced atomic layer deposited silicon nitride thin films |
| https://doi.org/10.1109/snw63608.2024.10639201 | Multi-Vt Gate Stack Technologies for Nanosheet and CFET Devices |
| https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631417 | DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM |
| https://doi.org/10.1117/12.3034575 | Substantial dose reduction using dry deposited underlayer for EUV lithography while maintaining roughness and minimizing defects |
| https://doi.org/10.1117/1.jmm.24.1.011010 | Assist features for extreme ultraviolet imaging in 0.55 numerical aperture |
| https://doi.org/10.1117/12.3054374 | Probing defects in metal oxide resists with an electrical yield vehicle |
| https://doi.org/10.1039/d5nr01514f | Nanostructuring copper thin film electrodes for CO 2 electroreduction to C 2+ products |
| https://doi.org/10.1007/978-981-96-9095-4_11 | Faster VOLEitH Signatures from All-But-One Vector Commitment and Half-Tree |
| https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11075104 | High-Density Wafer Level Connectivity Using Frontside Hybrid Bonding at 250nm Pitch and Backside Through-Dielectric Vias at 120nm Pitch After Extreme Wafer Thinning |
| https://doi.org/10.1007/978-3-032-01887-8_5 | Shorter, Tighter, FAESTer: Optimizations and Improved (QROM) Analysis for VOLE-in-the-Head Signatures |
| https://doi.org/10.1038/s44161-025-00749-4 | Human genetics implicate thromboembolism in the pathogenesis of long COVID in individuals of European ancestry |
| https://doi.org/10.1016/j.sse.2004.03.020 | Development of silicon nitride dots for nanocrystal memory cells |
| https://doi.org/10.1149/1.2986862 | SiCP Selective Epitaxial Growth in Recessed Source/Drain Regions yielding to Drive Current Enhancement in n-channel MOSFET |