Publications in OpenAlex of which a co-author is affiliated to this organization
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| Title | DOI |
|---|---|
| https://doi.org/10.1149/ma2015-02/26/990 | (Invited) ALD Materials for the Integration of III-V Based Transistors |
| https://doi.org/10.1149/ma2020-02241733mtgabs | Contact Resistivity of Highly Doped Si:P, Si:As, and Si:P:As Epi Layers for Source/Drain Epitaxy |
| https://doi.org/10.1149/ma2006-02/31/1414 | Tensile Strained Selective Silicon Carbon Alloys for Recessed Source Drain Areas of Devices |
| https://doi.org/10.1149/ma2009-02/31/2363 | On the Low-Frequency Noise Performance of Embedded Si:C nMOSFETs |
| https://doi.org/10.1149/ma2006-02/31/1450 | Selective Epitaxy of Si/SiGe to improve pMOS devices by recessed Source/Drain and/or Buried SiGe Channels |
| https://doi.org/10.1109/tsm.2018.2885184 | IEEE Transactions on Semiconductor Manufacturing publication information |
| https://doi.org/10.1149/ma2014-02/30/1613 | Engineering the III-V Gate Stack Properties by Optimization of the ALD Process |
| https://doi.org/10.1149/ma2008-02/37/2486 | SiCP Selective Epitaxial Growth in Recessed Source/Drain Regions yielding to Drive Current Enhancement in n-channel MOSFET |
| https://doi.org/10.1149/ma2005-02/13/553 | Evaluation of Nb(Si)N as Metal Gate Material |
| https://doi.org/10.1149/ma2010-02/20/1416 | New Mechanisms for Ozone-Based ALD Growth of High-k Dielectrics via Nitrogen-Oxygen Species |
| https://doi.org/10.1109/istdm.2006.1716002 | Highly Tensile Strained Silicon Carbon Phosphorus Alloys Epitaxially Grown into Recessed Source Drain Areas of NMOS devices |
| https://doi.org/10.1149/ma2006-02/21/1075 | Radical-Assisted Silcore(TM)CVD of Si3N4 and SiO2 Nanolaminates |
| https://doi.org/10.1109/istdm.2006.1662613 | Highly Tensile Strained Silicon Carbon Phosphorus Alloys Epitaxially Grown into Recessed Source Drain Areas of NMOS devices |
| https://doi.org/10.1149/ma2007-01/12/605 | Defect Free Embedded Silicon Carbon Stressor Selectively Grown into Recessed Source Drain Areas of NMOS Devices |
| https://doi.org/10.1149/ma2022-02321187mtgabs | Low Temperature Selective Epitaxy of Group-IV Semiconductors for Nanoelectronics |
| https://doi.org/10.1149/ma2022-02311120mtgabs | Atomic Layer Deposition for Memory Applications |
| https://doi.org/10.1117/12.2660376 | Scaled-down deposited underlayers for EUV lithography |
| https://doi.org/10.4028/p-qqi9w5 | Study on Alternative Dipole Material Wet Clean by pH Controlled Functional Water |
| https://doi.org/10.5817/lb2023-2-5 | E. F. K. Koerner (5 February 1939 – 6 January 2022) |
| https://doi.org/10.5194/egusphere-egu24-3405 | A pseudo-streamer unveiled by a jet and its interaction with a CME |
| https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631441 | Backside Power Delivery with relaxed overlay for backside patterning using extreme wafer thinning and Molybdenum-filled slit nano Through Silicon Vias |
| https://doi.org/10.1116/6.0003971 | Atomic layer deposition of transition metal chalcogenide TaSx using Ta[N(CH3)2]3[NC(CH3)3] precursor and H2S plasma |
| https://doi.org/10.1116/6.0004116 | Line wiggling due to plasma-induced film stress and prevention by surface roughness modification |
| https://doi.org/10.1109/eptc62800.2024.10909913 | Diffraction-Based Alignment Sensor and Mark Design Optimization to Enable Fine Overlay Accuracy for 50um-Thick Si Wafer Bonded to Glass Wafer in Die-to-Wafer Bonding Applications |
| https://doi.org/10.1117/12.3051566 | Design enablement of low-cost stitching in high-NA EUV patterning |
| https://doi.org/10.1117/12.3051708 | Dry resist process optimization at the 0.33NA resolution limit and validation via large area e-test inspection |
| https://doi.org/10.1007/s00145-025-09550-9 | A New Linear Distinguisher for Four-Round AES |
| https://doi.org/10.1007/978-3-032-01901-1_6 | Breaking the IEEE Encryption Standard XCB-AES in Two Queries |
| https://doi.org/10.1109/lsens.2025.3626966 | Thermal Annealing as a Key Strategy for Enhancing the Electrochemical Stability of Fully Bioresorbable Mo and MoO x Electrodes in Physiologically Mimicking Conditions |
| https://doi.org/10.1117/1.jmm.24.4.041205 | Design enablement of low-cost stitching in high NA EUV patterning |
| https://doi.org/10.1007/s10994-025-06970-3 | Performance Estimation in Binary Classification Using Calibrated Confidence |
| https://doi.org/10.1007/s10623-025-01742-5 | Generalized indifferentiable sponge and its application to Polygon Miden VM |
| https://doi.org/10.1109/radecs61970.2024.11298578 | Bias Temperature Instability on SEE Susceptibility: Analysis on Combinational and Sequential Elements |
| https://doi.org/10.1007/978-3-032-10536-3_7 | Multiforked Iterated Even-Mansour and a Note on the Tightness of IEM Proofs |
| https://doi.org/10.1063/5.0281468 | Poole–Frenkel emission and bulk charge trapping in AlON deposited on GaN and comparison to Al2O3 |
| https://doi.org/10.1021/acs.nanolett.5c05273 | Resolving the On–Off Ratio Discrepancy in Bilayer 3R-MoS 2 FeSFETs: Dual Mechanisms of Domain Wall Engineering |
| https://doi.org/10.1109/iedm50572.2025.11353866 | Hybrid Channel monolithic-CFET with Si (110) pMOS and (100) nMOS |
| https://doi.org/10.5281/zenodo.18455047 | Hybrid Channel monolithic-CFET with Si (110) pMOS and (100) nMOS |
| https://doi.org/10.5281/zenodo.18455048 | Hybrid Channel monolithic-CFET with Si (110) pMOS and (100) nMOS |
| https://doi.org/10.5281/zenodo.18480616 | Junction-engineered Scaled High-performance GAA Nanosheet FETs with Ultra-low Temperature (< 350 °C) SiGe: B Source/Drain |
| https://doi.org/10.5281/zenodo.18480617 | Junction-engineered Scaled High-performance GAA Nanosheet FETs with Ultra-low Temperature (< 350 °C) SiGe: B Source/Drain |
| https://doi.org/10.1021/acsami.5c22544 | Elucidation of Enhanced Lysine Sensing via Pt-Functionalized 2D WS 2 for Biosensing Applications |
| https://doi.org/10.1109/icee67165.2025.11409742 | Direct analysis of RTA impact on S/D epi and channel resistance versus contact resistivity in n- and p-NSFET with cascaded transistor methodology |
| https://doi.org/10.1109/tdmr.2026.3673011 | Impact of Post-Metallization Annealing on the Reliability of Barrierless Mo Word Lines |
| https://doi.org/10.5281/zenodo.19068863 | Direct analysis of RTA impact on S/D epi and channel resistance versus contact resistivity in n- and p-NSFET with cascaded transistor methodology |
| https://doi.org/10.5281/zenodo.19068862 | Direct analysis of RTA impact on S/D epi and channel resistance versus contact resistivity in n- and p-NSFET with cascaded transistor methodology |
| https://doi.org/10.1109/tvlsi.2026.3673227 | Thermal Insights of 3-D BS-PDN in Cloud Server SoC Using TCAD Modeling |
